1. Field of the Invention
This invention relates to a manufacturing method of a semiconductor device, specifically to a manufacturing method of a high voltage MOS transistor incorporated in a semiconductor integrated circuit.
2. Description of the Related Art
The high voltage MOS (metal oxide semiconductor) transistor has a high source-drain withstand voltage (BVDS) or a high gate withstand voltage, and is applied to an LCD driver, an EL driver, a power supply circuit and the like.
FIG. 14 is a cross-sectional view showing a structure of an N-channel type high voltage MOS transistor according to a conventional art. A gate oxide film 101 and a thick field oxide film 102 are formed on a surface of a P-type silicon substrate 100. A gate electrode 103 is formed on the gate oxide 101 and extending onto an adjacent portion of the field oxide film 102. An N+-type source layer 104 is formed in a surface of the silicon substrate 100 adjacent to one end of the gate electrode 103. An N+-type drain layer 105 is formed in a surface of the silicon substrate 100 apart from the other end of the gate electrode 103.
An N−-type drain layer 106 is formed in a part of the surface (offset region) of the silicon substrate 100 between the N+-type drain layer 105 and the other end of the gate electrode 103. The N−-type drain layer 106 is diffused deeper than the N+-type drain layer 105, and extends to the end of the gate electrode 103 through the region under the field oxide film 102.
A high source-drain withstand voltage can be obtained with the high voltage MOS transistor structure described above, since a depletion layer expands into the N−-type drain layer 106 to relax a drain electric field when a high voltage is applied to the drain layer 106. Also the structure is sturdy against destruction of the gate oxide film 101, because the gate electrode 103 extends from the gate oxide film 101 onto the adjacent portion of the field oxide film 102.
However, according to experiments performed by the inventors, the conventional transistor structure described above has a problem of low withstand voltage against electrostatic discharge (hereafter referred to as ESD withstand voltage). For example, the ESD withstand voltage measured by a common ESD damage test based on a human body model (capacitance: 100 pF, resistance: 1.5KΩ) is about 500V, which is not high enough.